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CPU Core RTL Design Engineer - 158501

What you do at AMD changes everything 
 
At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 
 
Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.  If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

CPU CORE RTL DESIGN ENGINEER
 
THE ROLE:
 
As a CPU Core Architecture/RTL Engineer, you will have a unique opportunity to craft a functional
unit in AMD’s next-generation core. You will work in the center of an experienced, skilled, and
motivated engineering team with a track record of success. As a member of the Core
Architecture/RTL team, you will work on the leading edge of processor technology and
collaborate with the Performance Modeling, Design Verification, Physical Design, and Post-Silicon
Teams to make AMD’s ambitious future CPU roadmap a reality.
 
THE PERSON:
 
You approach challenges relentlessly with both critical thinking and creativity. You work as part of
a team with strong communication and collaboration skills. You have a solid understanding of
modern CPU architecture and have ideas and/or drive to make it even better. Does this describe
you? If so, then join us!
 
KEY RESPONSIBILITIES:
  • Execute on RTL design and coding for various sections of the processor core pipeline and related logic.
  • Collaborate with a team of hardware and software engineers to define the high-level architecture.
  • Participate in the definition of microarchitecture of next-generation high-performance processor cores.
  • Contribute to design verification, performance verification, synthesis, power reduction, timing convergence, and floorplan efforts.
  • Contribute to silicon debug and product support as needed.
 
PREFERRED EXPERIENCE:
  • Verilog RTL development with industry tools in a CPU, SOC or ASIC environment
  • Demonstrates expertise in the following:
  • Processor architecture
  • Logic design
  • RTL coding experience for a high-speed processor
  • Power-saving techniques
  • Exposure to physical design and verification methods
  • Awareness of synthesis, place and route, and timing closure concepts
  • Development experience from clean-sheet design to product tapeout to post-silicon debug.
  • Proven experience with microarchitecture development, as demonstrated by patents, publications, product features
  • Strong problem-solving and debugging skills in both pre- and post-silicon environments.
 
ADDITIONAL EXPERIENCE DESIRED:
  • Background in other aspects of ASIC implementation, especially with synthesis flow and static timing analysis
  • Knowledge of microprocessor Design-for-Test (DFT) and Design-for-Debug (DFD) logic and issues
  • Experience in clocking, reset, power-up sequences and power management
  • Experience with x86 or ARM Architecture (ISA)
  • Comfort with scripting such as Perl, Python, Ruby, Shell and/or TCL
 
ACADEMIC CREDENTIALS:
  • BS, MS, or PhD degree in Electrical, Computer Engineering, or related field of study.
 
LOCATION:
  • Austin, TX